As described, e.g., in "A Use of Double Integration in Sigma-Delta-Modulation" IEEE Trans. on Comm., COM-33, p. 249-258, March 1985, the sigma-delta modulator comprises at least one integration stage or filter followed by a quantization stage (comparator) and a feedback from the output of the comparator to the input of the integration stage. Dependinq on the number of integration stages, sigma-delta modulators can be divided into second-order, third-order or fourth-order sigma-delta modulators. Such high-order sigma-delta modulators (SDM) have recently become increasingly interesting in audio and ISDN applications. This is due to the fact that the introduction of high-order modulators increases the number of integrations to be carried out, which results in a decrease in the noise level of the pass band, the quantization noise being shifted to a higher frequency level. This is called quantization noise shaping through integration. This technique provides improved signal-to-noise ratio and improved precision. Thus a high-order sigma-delta modulator would offer an interesting application in A/D or D/A converters.
However, the practical realization of a sigma-delta modulator formed by conventionally series-connected integrators is problematic due to the oscillation caused by the feedback loop. It is suggested in "A 16-bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping", IEEE Journal of Solid State Circuits, Vol. SC-22, No. 6, December 1987, p. 921-929, that this problem could be overcome by means of a high-order sigma-delta modulator system formed by cascading several stable first-order sigma-delta modulators. This technique will be called a MASH technique hereinafter. The quantization error of a signal first in the cascade was applied to a sigma-delta modulator second in the cascade to be quantized into an error signal. The quantization error signal was differentiated by a digital differentiator which performed digitally the noise transfer function of the integrator of the first modulator. Thereafter the quantized error signal was subtracted from the quantized output signal of the first modulator, whereby there remains only the quantization noise of the second modulator. Correspondingly, the quantization error of the second modulator was applied to a modulator third in the cascade. The quantized output of the third modulator, in turn, was subtracted from the quantized output signal of the second modulator, and the quantized output signal was subtracted from the output of the first modulator, whereby the third-order quantization noise only remained at the output of the system. In this way, a stable third-order sigma-delta modulator was obtained. An A/D converter realized in this way provides a 16-bit signal-to-quantization noise ratio (S/Nq) within the audio band (24 kHz).
Increase in the number of cascaded stages requires greater precision from each individual modulator component if the bit resolution is to be increased. Therefore the realization of a modulator system of an order higher than that described above by adding to the cascade a forth or fifth first-order sigma-delta modulator easily causes problems. Modulators are generally realized on integrated circuits, whereby an increased number of modulators requires more chip area. The area of the chip should also be increased because the character of the first-order modulator requires that the first modulator has to be realized in differential form and a common-mode rectangular wave having a frequency outside the pass band has to be connected to the input (dither).